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Between memory and the CPU
Date memory bus memory channel between rows of speed on the performance of the whole system is very important, because the speed between memory and the CPU is more or less there will be differences, so there will be a level two cache, to coordinate the difference between the two, and the memory bus speed is CPU and the two level (L2) caches the communication speed between memory and memory
Date memory bus memory channel between rows of speed on the performance of the whole system is very important, because the speed between memory and the CPU is more or less there will be differences, so there will be a level two cache, to coordinate the difference between the two, and the memory bus speed is CPU and the two level (L2) caches the communication speed between memory and memory
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